Pseudo Random Binary Sequences (PRBSs) can be generated using methods that result in an almost-perfect random number sequence. A PRBS can be generated in a circuit with a minimal amount of circuitry compared with other methods. A single bit PRBS sequence requires an n bit shift register and one XOR gate to generate a 2n−1 sequence of numbers. Every n-bit number is represented once. Normally the only missing number is n zeroes. PRBSs have applications in many areas of digital design, e.g., cryptography, radio communications, telecommunications, mathematical algorithms, noise generators, and testing.
Some conventional large digital circuits run at speeds of around 100-400 MHz. Telecommunications and other high speed interfaces can run at 100 GHz or more. It can be useful to test a high-speed serial interface by feeding a random set of bits through the interface; however, this can be technically challenging due to the mismatch in speed. To overcome this, PRBSs are generated in parallel. Instead of generating one bit per clock cycle, many bits are generated per clock cycle. The resulting circuits, however, may require a substantial amount of routing between logic gates, which can increase the technical difficulty in routing the circuit to meet speed and timing requirements.
Accordingly, there exists a need for circuits for generating PRBSs in parallel with reduced routing requirements.